Embedded: TI and Aricent offer small cell stack for KeyStone
Texas Instruments and Aricent have collaborated on a small cell protocol stack for TI’s KeyStone-based multicore system-on-chip (SoC) devices.
According to Rakesh Vij, vice president of business development, Aricent Group: “Our small cell protocol stack has been chosen by several leading OEM vendors and is in advanced trials or production systems today.”
“This collaboration further cements our leadership in providing world-class LTE software. Our software together with our product engineering services help OEMs to introduce innovative new solutions to the market quickly and efficiently,” said Vij.
TI’s scalable KeyStone architecture includes support for both TMS320C66x digital signal processors (DSP) generation cores and multiple cache coherent quad ARM Cortex-A15 clusters, for a mixture of up to 32 DSP and RISC cores.
The KeyStone architecture includes fully offloaded, flexible packet and security coprocessors and capacity expansion for SoC structural elements such as TeraNet, Multicore Navigator and Multicore Shared Memory Controller (MSMC).
The small cell protocol stack from TI and Aricent will be available in second half of 2012.