Powerline comms firm switches on first chipset

SiConnect, the powerline comms chipset developer, says it has received first-time working silicon for its first powerline transceiver.

The firm said it is “on course to be sampling its first product during Q4 2006 and moving to volume availability in Q1 2007”. The target application for the transceivers is in-the-home or office comms over existing mains power cabling.

Si-Connect has recently secured additional venture funding of £2.8m from existing investors Esprit Capital Partners, TTP Ventures and Dow Venture Capital.

Russell Haggar of Esprit Capital Partners said the investors were pleased to be able to support what he called “a trailblazing company that has very successfully produced its first chip”.

The company selected Chartered Semiconductor’s 0.18micron HV CMOS process for its first chip implementation and Unisem for die packaging.

According to SiConnect’s v-p engineering, Paul Nickson, the POEM transceiver is a leading-edge device and “implementing it in what is a highly reliable and mature process has proven to be the right route for us to take, both in terms of quality and cycle time”.

Tags: edge device, leading edge, mains power, unisem, venture capital

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