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EDA and IP

Cambridge firm has IP to test Google VP9 codec standard

Sample video frame from an Argon Streams VP9 bit-stream, shows the directed random number based approach.

Argon Design, a Cambridge-based developer of video compression chip test technology, has signed a licensing agreement with Renesas Electronics. It involves IP for compliance testing to Google’s VP9 codec standard. Argon Streams VP9 is a set of conformance test bit-streams providing full coverage and verification of VP9 video decoders. The bit-streams are derived directly from Google’s VP9 Reference Code using ...

Asic design doesn’t need to be a rich man’s game

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Dedicated ASIC design can be cost-effective with the availability of production capacity, tools and lower mask costs, write Nicolas Williams and Jeff Miller Anecdotal mentions of hefty sums of more than $25m just to buy one mask set and total design costs reaching into many hundred million dollars, seem to mark out ASIC design as a rich person’s game. But these ...

Verification is key as automotive chip design goes 28nm

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IC design house Sondrel says that automotive SoC design is now starting to focus around  the 28nm process node. This is now a well-established and high yield node and so will support the automotive sector’s need for dielectric isolation (leakage current v speed trade off). This will mean that IC designers must address the design rules associated with: High Temperature ...

Green Hills adds security to 64-bit ARM and Intel processors

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Green Hills Software is offering a real-time, fast-boot platform for securely combining consumer operating systems such as Linux, QNX, Android or Windows with safety- and security-critical software on 64-bit multicore processors. Based on the supplier’s Integrity real-time operating system, the Multivisor virtualisation platform supports both ARM and Intel 64-bit architectures. Green Hills Software’s secure virtualisation platform is being used automotive, ...

Electronics patent of the month: The problem of spurious monitored signals

BD

This month features the problem of spurious monitored signals in hospitals, which comes up in CareFusion Corporation’s GB patent. Michael Jaeger, patent attorney at leading UK patent and trade mark attorneys Withers & Rogers LLP, writes: GB Patent Number: GB2476862 Granted to: CareFusion Corporation I’ve certainly overheard some interesting discussions between my children recently… “I don’t like drinking water” my daughter ...

SoC design verification at all levels is key, says Cadence

PaulMcLellan

Verification technology has advanced significantly over the last few years and with today’s SoC design, verification needs to be done at all levels, from the system down to the silicon in parallel, moving up and down the levels as appropriate, writes  Paul McLellan, Cadence Design Systems. The key verification technologies are formal approaches, simulation, virtual platforms, emulation and FPGA prototyping. Each technology ...

Cambridge conference explores GUI design for IoT devices

Atilia

If you are looking to add a top of the range graphical user interface to your design project, Julian Coates from Altia may be worth a listen at the UK Device Developers’ Conference, which takes place in Cambridge on the 27th and 28th April. Increasingly the graphical user interface (GUI) is being used to differentiate embedded system design and this is most ...

Emulation is essential for processor design, says Imagination

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Imagination Technologies, the processor developer behind PowerVR GPUs and MIPS CPUs, has deployed the Veloce emulation platform’s virtualised testbench acceleration (TBX) technology from Mentor Graphics. The emulator was used in the verification flow for the PowerVR Wizard GR6500, a ray-tracing-enabled graphics processing unit (GPU). Martin Ashton, executive v-p, PowerVR, Imagination Technologies, writes: “To simplify the verification of complex Imagination IP, ...