EDA and IP Design News

Mentor CEO says chips can be protected against hackers

Silicon-based hacking problems are not yet seen as a threat to security on the internet. But this may be because any breaches of security at the silicon level are not reported. It could also be because there are easier ways to penetrate computer networks. Most of the security problems…

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Mentor links IC, package and PCB design in single tool

Mentor Graphics is bringing together the IC design, package design and PCB layout in a single tool environment. The design environment called Xpedition Package Integrator flow can be used to integrate existing IC, package and PCB design tools from Mentor and even third party tools. According to Mentor, the integration…

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Cadence aims to speed design of big 14nm chips

Cadence Design Systems has introduced its next generation place and route IC design tool which includes a new solver-based placement engine and clock optimisation techniques.    Called Innovus Implementation System, the tool’s core algorithms have been enhanced with multi-threading throughout the full flow, as a result designers will…

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Gigabit Wi-Fi firm verifies SystemC UVM design

Blu Wireless, the gigabit Wi-Fi IP developer, has quality tested its SystemC-based UVM software with software verification specialist TVS. Bristol-based Blu Wireless is hoping to target its millimetre wave wireless technology at next generation high speed Wi-Fi applications. Ray McConnell, CTO of Blu Wireless, commented, “After…

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Digi-Key adds premium Mentor tools to the list

Digi-Key has added to the range of professional-level Mentor Graphics EDA/CAD tools it offers. The two companies have been collaborating for the last year to make professional-level EDA software at lower cost. Premium versions of both the Designer Schematic and Designer Layout tools are now available…

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Electronics patent of the month: Contact profiles for landline telephones

Michael Jaeger, patent attorney at leading UK patent and trade mark attorneys Withers & Rogers LLP, writes: GB Patent Number: GB2488459 Granted to:  BT PLC We increasingly use technology to connect our lives.  Like me, many of you will have a plethora of online accounts and a sometimes confusing array…

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Green Hills challenges "rudimentary" Linux debug

Green Hills Software has announced a software development environment for embedded Linux developers. According to Green Hills, the Linux development software in its MULTI tool suite will address the “rudimentary” state of many debuggers for Linux, which it said were “difficult to learn, setup, and use and lack the powerful…

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Chip verification moves to system-level

Cadence Design Systems announced the Cadence Perspec System Verifier platform for use-case scenario-based software-driven system-on-chip (SoC) verification. “Design has moved from constraint driven verification to metric driven verification and now it moves to software driven verification based on top-down system design scenarios,” said Frank…

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