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EDA and IP

STM32 developers get access to low-layer APIs

STM32 Nucleo

STMicroelectronics has added low-layer application program interface (LL API) software to its STM32 development tool set. This is for experienced designers and will allow them to work with the ARM Cortex-M microcontrollers (MCUs) down to register-level code, to controlling device peripheral and to optimise performance and run-time efficiency. The LL APIs are integrated into the STM32Cube packages with example projects designed ...

Imagination increases security on MIPS processors

MIPS M5150

Imagination Technologies has teamed up with Eindhoven chip security firm Intrinsic-ID to add a ‘physically un-cloneable function’ (PUF) to MIPS cores – initially the M5150 CPU – for authentication and anti-cloning. “With growing connectivity across nearly every product category from consumer to automotive to industrial and beyond, security is an ever increasing challenge, and the massive amount of smart devices makes ...

Updated: Micro-sequencing crams 8051 into tiny FPGA space

MicroCore Labs MCL51

Californian start-up MicroCore Labs has announced an 8051 soft processor core, four of which will fit into 1227 LUTs on a Xilinx Artix-7 FPGA. The core is called MCL51. “Because it is based on a microsequencer, this four-core demonstration is even smaller than a single soft-core gate-based 8051,” the company founder, known simply as Edward, told Electronics Weekly. “The execution unit of ...

Xilinx Zynq UltraScale gets embedded software support from Mentor

Zynq Ultrascale

Mentor Graphics is now supporting the Xilinx Zynq UltraScale+ MPSoC devices with its embedded tools and software portfolio. The embedded software support includes Linux and Android OS, Nucleus real-time operating system (RTOS) and Mentor’s Embedded Hypervisor. Scot Morrison, general manager of the platforms business unit, Mentor Graphics Embedded Systems division, writes: “Dealing with the complexities of today’s heterogeneous multicore systems, ...

Embedded FPGA used to tweak SoC design without re-spins

eFPGA fabric

Embedded FPGA intellectual property developer Menta is offering embedded programmable logic as both custom and pre-defined IP cores based on its eFPGA fabric. Already available for TSMC 28nm HPM and STMicroelectronics 28nm FDSOI process technologies, the IP is now available for GlobalFoundries 14nm LPP process. Menta’s eFPGA technology was demonstrated this week at the Design Automation Conference in Austin, Texas. ...

App-based emulators go beyond RTL verification

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Application-specific IC design emulators extend their use beyond RTL verification and represents the fourth era in the evolution of emulation, writes Jean-Marie Brunet. In the first era, emulators were used to perform in-circuit emulation (ICE). The purpose was to test a design against real-world stimulus using physical peripherals. For example, by plugging in an Ethernet cable the design could be ...

Open source hypervisor runs multiple OS in IoT designs

An open source hypervisor can now be used with  Imagination’s OmniShield ready MIPS CPUs. Designed for a small footprint, the  L4Re hypervisor, which is maintained by Kernkonzept, can run on the hardware virtualization technology in MIPS CPUs. The aim of this is to provide more efficient context switching and to make better use of CPU cycles. According to Imagination, hardware ...

ARM expands DesignStart – 45 sample SoCs for $16k

ARM designstart

ARM has expanded its ARM DesignStart initiative to offer simplified and expedited access to EDA tooling and design environments from Cadence and Mentor Graphics. The new partnership builds on the benefits of free access to ARM Cortex-M0 processor IP offered through the DesignStart portal. The new ARM Approved Design Partner program also provides DesignStart users with a global list of ...

SureCore SRAM IP runs at 20MHz on 0.6V

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SureCore, the Sheffield low power SRAM IP specialist, says its ultra-low voltage SRAM IP operates at 0.6V on on TSMC’s 40nm ULP CMOS process, delivering from 20MHz at 0.6V to 300MHz at 1.21V. “Standard SRAM is not reliable below 0.9V, but SureCore’s single supply rail, Ultra-Low Voltage SRAM allows operating voltage to scale in tandem with the logic,” says SureCore ...

UltraSOC refines tool suite

Rupert-Baines

UltraSoC has announced the latest version of its semiconductor IP and software tools for SoC development, debug, optimisation and hardware security. The latest release in UltraSoC’s continuous development program includes extended support for data analytics and visualization, improved performance monitoring and system optimization capabilities, enhanced integration with third-party tool-chains, improved support for functional safety applications, and General Availability (GA) of ...