Free IC verification event attracts big names
IC design conference, entitled Accelerating Verification – faster, smarter? is being held on Wednesday 25 June at CFMS, an independent centre for modelling and simulation located on the Bristol & Bath Science Park.
The free of charge one-day event, which is being organised by the NMI, is sponsored by design software tool vendors Cadence, Mentor Graphics and Synopsys.
There will be a presentation from ARM on the use of abstract models & virtual platforms.
Another interesting paper called “Verifying the Design and Implementation of Software for Robots & Autonomous Systems” comes from Dejanira Araiza-Illan & Piotr Trojanek of the University of Bristol.
Nigel Elliot from Mentor Graphics will be describing a scalable approach to functional verification, Kong Susanto of Cadence will look at verification acceleration and David Robin from Synopsys will describe the ZeBu hardware emulator.
Speaking at the conference is Wayne Wu, Business Development Director with design consultancy Sondrel, who will be presenting an internet of things (IoT) SoC design using Mentor’s Veloce emulation.
Wayne Wu explains, “A typical SoC design for ‘mobile’ or IoT applications consists of one or more embedded processors, GPUs and various I/O interfaces, with the added complexity of being low power, mixed mode, RF and SIP.”
Wu said his paper presents a way to reduce the overall verification time of a typical IoT mixed mode SoC device.
Other presentations include:
How to speed up your EDA flows – Richard Jordan, Ellexus
Accelerating The Verification Of Hardware Dependent Software – Alex Grove, Aldec / First EDA
Adoption of Formal Techniques at Dialog – Steven Holloway, Dialog Semiconductor.