RTOS supports code reuse across ARM Cortex M cores
By using the memory protection unit (MPU) on ARM Cortex M- based cores, the Nucleus RTOS process model creates memory partitioning without the need to implement virtual memory, maintaining a lightweight operating environment that can be executed in devices with limited memory by “executing in place” out of flash devices.
The new RTOS also incorporates a multicore framework for asymmetric multi-processing (AMP) designs.
Based on a clean-room implementation of the functionality in “virtIO”, “remoteproc”, and “rpmsg”, MEMF enables developers to integrate Nucleus RTOS, Linux, and bare metal-based applications and manage the design issues associated with inter-process communication (IPC), resource sharing, and processor control within a heterogeneous multi-OS environment.
Developers can control the boot-up and shut-down of individual cores on a SoC, allowing applications to maximize compute performance or minimize power consumption based on the use case.
There is GPU with OpenGL/ES integration.Tags: ARM, arm processors, EDA, Mentor Graphics, rtos