Warren Savage: Can you give me a little background on yourself and how you got into the IP business?
Dan Kochpatcharin: I got my first taste of IP when I was working on the Coreware program at LSI Logic in the ‘90s. My team was trying to figure out methodology to reuse and allow in-design verification of hardened IP. At the time, IP reuse was still in its infancy. Twenty years later, I am still working on IP reuse with one major exception: I am working with ecosystem vs. internal IP.
WS: So, how would you rate the experience of working in IP versus other jobs you’ve held?
DK: It is one of the more interesting jobs. IP is one of most important factors in getting the tape-out quickly. There is a lot of misconception about reusability and implementation difficulty. It is about understanding the business model and being a stickler for quality. The goal is to understand and work with the IP vendors, fab and customers to meet expectations.
IP usability has come a long way. There is an understanding of “usage” model and deliverables amongst the vendors and users of IP. However, there is a still a lot to be done in terms of standardization and quality. I will give a few examples: characterization corners, EDA views, and quality check. Our TSMC9000™ program is helping to address these gaps.
WS: There has been tremendous consolidation of the IP market in recent years, with a number of the small and medium players getting gobbled up by the big guys. What does this tell us?
DK: I think this is nothing new and I think it is a healthy flow. Consolidation in the IP market has been going on for ages. The IP market space needs to have innovation and most of the new innovations come from smaller IP vendors. To scale, sometimes the smaller IP vendors need help from the bigger companies.
WS: The tech media of today, at least in the US, seems to have drastically shrunk. Famous editors are now working for product companies. How do you get your message out to customers in such an environment?
DK: TSMC has our own Open Innovation Platform (OIP)™ event where we bring in our ecosystem partners—IP, EDA, Design Houses, VCAs—and customers.
WS: What’s the biggest change you’ve seen in the market since the meltdown of late 2008?
DK: I see a lot more outsourcing of IP from larger companies. In the past, these companies were doing most of their IP internally. Now, I see that they are more logical in deciding when to “make vs. buy.” For standard IP, or IP that has many sources, they will outsource them.
WS: It wasn’t long ago that many IP companies were worried about licensing IP to China. Has that changed post-2008?
DK: The IP market in China has grown since 2008. There are more fabless companies that are building innovative products. These companies do not have the same infrastructure, so they tend to outsource more. IP vendors are responding to this market.
WS: Let’s bring out our crystal ball for a moment. What do you predict will be the biggest, most disruptive change in semiconductors in the next 3 years?
DK: I cannot comment on the change in the semiconductor industry, but I will try to comment on the IP industry. There will be more of a requirement to outsource IP while the fabless and IDM companies focus on their core competencies. There will be a requirement from the customers to have better integrated IP and IP sales channels.
WS: What would be your recommendations for new EE grads coming into the semiconductor world today?
DK: Build your foundation well.
WS: Before we go: three terms that you would use to describe the semiconductor IP industry today.
DK: The first would be mature. The IP industry is going through a maturation cycle, from a lot of differences and individual company practices to more established practices.
Second, I would have to say quality. More focus on IP quality from foundry. An example would be the TSMC9000 program and the GSA, as well as standards from IEEE.
Lastly, business model. Business model consolidation will be next.
Dan Kochpatcharin, Deputy Director, IP Portfolio Marketing, TSMC, is responsible for overall IP marketing as well as managing the company IP Alliance partner program. Prior to joining TSMC, Dan spent more than ten years at Chartered Semiconductor, where he held a number of management positions, including: Director of Platform Alliance, Director of eBusiness, Director of Design Services, and Director of Americas Marketing. He has also worked at Aspec Technology and LSI Logic, where he managed various engineering functions.
Dan holds a Bachelor of Science degree in electrical engineering from UC Santa Barbara, a Master of Science in computer engineering, and an MBA from Santa Clara University.
Warren Savage, President and CEO of IPextreme, is a well-known and published authority in the field of semiconductor intellectual property.
He has a long history of pushing the envelope of design methodology from his work in fault tolerant computing at Tandem Computers in the 1980’s and driving reliable design methodologies into commercial practice at Synopsys for its DesignWare IP product in the 1990s. Much of his thinking became embodied in the seminal book on IP reuse, the Reuse Methodology Manual.
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