Zuken targets FPGAs with new PCB design tool
Zuken’s latest release of its CR-5000 PCB and IC Package design software has been optimised for FPGA development and for high-speed design.
For improved co-design of PCBs and programmable devices, such as FPGAs and Asics, there is tighter integration in CR-5000 with Zuken’s Graphical Pin Manager (GPM).
New changes to high pin count, multi-symbol devices in GPM can be updated collectively and automatically during logical circuit design.
For FPGA design, pin constraint files in vendor specific formats, such as Xilinx or Altera, can submitted to FPGA design tools, while updated signals associated to a device pin or signal names can be filtered.
Other improvements include new filter options to control attributes while exporting pin-out information for better IP control during Asic development.
The tool suite also allows designers can automatically derive total routing capacitance to meet vendor specification for high-speed applications, such as DDR3. It has support for nested sub-circuits and coupled inductors (K elements) for importing SPICE models.
Also included are enhancements to DDR2/DDR3 wizards for managing constraints for multi-receiver, high-speed signal structures, and enhanced design reports supporting cross-probing with the PCB design.