ISSCC: Quad x86 throttles from 0.5W to 1.85GHz
AMD presented Jaguar at ISSCC, its four core x86-64 processor for SoCs which can throttle down to 0.5W, or up to over 1.85GHz and 25W.
The 28nm 11 metal layer processor occupies 26.2mm2, and “is implemented with an emphasis on design efficiency, while improving instructions-per-cycle, frequency and power compared to the prior-generation 40nm dual-core Bobcat,” said AMD.
Alongside the four cores are four 0.5Mbyte L2 cache modules and an L2 interface.
“The shared 2Mbyte L2 cache is a significant advantage over the dedicated per-core 512kbyte cache configuration of dual-core Bobcat,” said AMD. “The L2 interface allows data to flow between the L2 cache, the core and the north bridge.”
Compared Bobcat, the load-store unit is redesigned, and the floating point unit natively supports 128bit operation.
Paper 3.4 Jaguar: A Next-Generation Low-Power x86-64 CoreTags: AMD, ISSCC, quad, x86