A deeper look at GaN for power
A little bit of semiconductor magic made a lot of difference to RF power amplifiers, and looks like it will do the same for mains PSUs.
That magic is the ‘two-dimensional electron gas’ that forms between layers in certain semiconductor stacks.
For example, given a layer of n-doped AlGaAs in intimate contact with a layer of undoped GaAs, some electrons move from the AlGaAs and just across the boarder into the adjacent GaAs. Once there, uninhibited by dopant atoms, they form a thin flat high-mobility cloud – the 2D electron gas.
Takashi Mimura of Fujitsu used the AlGaAs/GaAs interface and invented the high electron mobility transistors (hemts) used in RF amplifiers.
Asif Khan of US firm APA Optics moved the idea into a AlGaN/GaN interface to make GaN hemts (which he called HFETs), and invented the device that is causing so much interest among mains power supply designers. The mobility in such a GaN electron gas is roughly double that of doped GaN.
“Because of polarisation charges, you get a nice channel for free,” Joff Derluyn, CTO at GaN wafer maker EpiGaN, told Electronics Weekly.
“GaN hemt mobility is 2,000cm2/Vs in the channel and in the access regions,” said International Rectifier CTO Mike Briere.
It is this boosted carrier mobility that is responsible for the extra low on-resistance of mains voltage GaN hemts – for example RFMD is claiming 40m? in TO247 for a 650V 30A device.
The need for this 2D gas brings an inherent disadvantage to GaN transistors, said Briere, as it comes with a corresponding surface charge that limits the maximum operating voltage of GaN hemts to something like 1,200V.
Others argue that they have techniques to push this higher and claim 2kV might be possible.
What ever the breakdown voltage is, surface damage makes it worse.
‘In-situ’ passivation, as practiced by wafer maker EpiGaN, deposits a layer of SiN over the AlGaN/GaN epitaxy before the wafers leave the epi reactors - stabilising breakdown voltage against future degradation.
Briere sums up GaN like this: “GaN is good for 20V to 1,200V, and then you have to go for a vertical structure [because of surface charge] and no longer have a 2D electron gas, just bulk GaN. And bulk GaN is only as good as bulk SiC - unless you can make a vertical 2D electron gas, and you can bet people are trying to figure out ways to achieve this.”
Silicon carbide (SiC) transistors are the other novel technology that is stirring up interest among power supply designers, this time from 1,200V to 1,700V.
Cree is offering a SiC mosfet at 650V, and it looks like GaN will vie directly with SiC somewhere between 650V and 1,200V.
“If you could have an ideal GaN switch, it would be better than SiC, but GaN epi is 106 more defective than SiC,” said Paul Kierstead, director of marketing at SiC mosfet and RF GaN hemt maker Cree. “So with GaN you have to over-design the blocking voltage to get over the defectivity and the GaN sweet-spot is probably a lot lower than 650V.”
Using the on-resistance/unit area figure-of-merit to judge static performance (see graph), “in its first generation, GaN is substantially better than silicon superjunction mosfets now, and GaN should be able to come down one or two orders of magnitude”, said Briere. “We don’t really know to where yet, even the theoretical GaN limit is not really certain.”
Judged only on the on-resistance/unit area figure-of-merit, SiC npn transistors (not on the graph) – as pursued by Fairchild – are even better than GaN hemts.
This makes SiC bipolar a technology to watch, although non-trivial base current means the on-resistance/unit area figure of merit is a poor predictor of overall static performance in the bipolar case.
“SiC bipolar will be much lower on-resistance, and particularly at high voltages like 2kV or 3kV, it looks very attractive,” said Briere.
One other thing in favour of GaN compared with SiC is that the epitaxy can now be built on silicon substrates, which cuts cost compared with sapphire or SiC substrates.
The process is not perfect yet, but IR is using it, and EpiGaN, Azzurro, and other firms are selling GaN-on-Si wafers.
Cree’s Kierstead points out that the cost of SiC substrates is also likely to drop as knowledge is gained and SiC transistors ship in larger volumes.
In RF amplifiers, GaN hemts offer GHz operation.
Mains GaN hemts are also lightning-fast, effortlessly out-switch silicon power devices, and they have lower output capacitance than Si mosfets.
This should give them an inherent dynamic advantage in mains PSU, if it were not for limitations in inductor technology that are putting an upper limit on PSU switching speeds – a limit that is within the capability of Si mosfets.
Briere claims faster switching at the beginning and end of transitions give marginal advantages to GaN, which increase at partial load.
He has figures from two 400kHz 200W (300V in to 30V out) quasi-resonant ‘LLC’ converters, one using GaN and one using Si power devices.
“The GaN one was 3% better at 200W and 17% better at 20W,” he said. “In applications which are at 10% load most of the time, this is meaningful.”
Like SiC JFET, GaN hemt is another technology that produces depletion-mode devices - transistors that are normally-on and need a negative voltage on the gate to turn them off.
Not only is a negative drive rail needed, but if the gate drive fails for some reason, the device turns hard on and shorts-out the mains through the converter inductor.
Although not necessarily an optimal answer, a low-cost low-voltage silicon mosfet cascoded with the GaN hemt or SiC Jfet removes both objections.
The cascode pair works well in both the static on and static off states, although accurately controlling switching waveforms on the hemt’s drain through the mosfet’s gate requires deep knowledge of the pair’s characteristics, and even small stray inductances between the mosfet drain and the hemt source can cause oscillation.
IR, maker of both transistor types, is thought to be developing co-packaged cascode pairs that can be used as a single 600V enhancement-mode transistor.
“There are advantages in cascode: the built-in low-voltage body diode of mosfet turns on the JFET to re-circulate inductive current, and a mosfet is a m? driver, much stronger than the ohms of an external driver chip,” said Briere. Although, “I think, in the end, people will use direct drive of depletion-mode device”, he added.
This is what Infineon has done with its SiC JFET driver chip, controlling a separate series-connected low-voltage Si mosfet as a safety device to open the circuit during shut-down.
Although hemt is the chosen transistor type, details are up for grabs. For example, RF GaN hemts tend to have a Schottky barrier gate, and this approach is being used in some devices intended for mains PSUs.
However, Briere argues that Schottky gates are far too leaky in the widths required, which is why IR uses an insulated gate.
Also, because the device is lateral, die tend to be laid out with source fingers approaching from one side, and drain fingers from the other. This inter-digitated approach delivers a lot of channel/area.
Canadian firm GaN Systems a rgues that these long-thin fingers burn out at the power levels possible, while thicker fingers mean less channel width.
It is proposing a chess board of source and drain squares, with connections made vertically through gold solder balls, copper poles, or vias.
“Drains go down through substrate, sources go up, or the other way, it doesn’t really matter which,” CEO Girvan Patterson told Electronics Weekly.
An added advantage, he said, is that the gate becomes a grid, with lower impedance than the long meander-line needed in interdigitated layouts.
“We are sampling key development partners now,” said Patterson. “We have done a lot of work at 600V, and at 1,200V.”
Companies developing GaN power transistors include established GaN RF transistor makers such as RFMD and Fujitsu; established power transistor companies like IR; and start-ups, among which are GaN Systems and microGaN.