More on: Infineon’s over-current blocking FET
Infineon Technologies is to develop a two-terminal semiconductor device that acts as a circuit breaker for hundreds of volts and amps: doubling the performance of its mains-voltage super-junction mosfets along the way.
The aim is to replace electromechanical circuit breakers with something faster.
“A circuit breaker can take up to 8ms to switch off current. Even 5ms is far too much for a Li-ion battery,” Dr Anton Mauder, project leader for high-voltage power device development at Infineon, told Electronics Weekly.
Mauder is also technical head of ‘NEST-DC’, a consortium consisting of Airbus, E-T-A, Infineon, Siemens, and the University of Bremen which, with German Government funding, aims to exploit the device, which is known over-current blocking field effect transistor (OCB-FET).
Airbus is in there because it wants fast circuit breakers for aircraft dc power grids. Photovoltaics are another potential application, as are electric cars.
The basic device is based on an idea by Dieter Silber and his group at the University of Bremen.
It uses depletion-mode jfets.
Depletion-mode jfets, such as the n-channel device in figure 1, are naturally ‘on’ and need a negative gate voltage (with respect to the source) to turn them off.
In figure 1, the transistor is in the classic constant current configuration where negative feedback from the resistor voltage drop and gate threshold voltage (Vth) cause the channel to regulate through-current to a reasonably constant value.
Silber’s device takes this a step further.
He put a p-channel jfet in place of the resistor (see figure 2).
In this configuration, the channel on-resistance of each jfet acts at the sense resistance for the other’s gate.
When current is flowing from top to bottom, it sees a purely ohmic conduction path consisting of the two channels in series.
Until that is, current reaches the point where one channel voltage drop reaches the Vth of the other jfet – say T2. At this point T2 starts to turn off, which causes the gate voltage of the p-channel jfet T1 to rise, which turns it off. This positive feedback turns both devices off completely in a few µs, and conduction cannot re-start until the power source is removed.
Which fet turns off first depends on the mix of threshold voltages and channel resistances. Fine tuning of these parameters, with due consideration to temperature, allows the trip current to be set – or rather, to set the minimum current that always passes, and the minimum current that never passes.
“At the threshold, the structure quenches, it pinches-off,” said Mauder. “You need very steep resistance after limit. This is an issue for basic structure. We could also use two depletion mosfets. We are investigating if mosfets or jfets are best. The environmental temperature is important.”
As an aside: this structure conducts backwards, but without the over-current blocking characteristic. When conducting forwards with regulated current or voltage, a well-defined negative resistance region can be measured. This negative resistance was once used in RF oscillators, where the pair was called a ‘lambda diode’.
Although this structure could work at hundreds of amps – it just has to have large junctions – there are two reasons it is not viable at hundreds of volts: firstly, the gates would have to withstand the full blocking voltage – close to a show-stopper for devices handling over 20V. Secondly, high-voltage junctions are far larger than low-voltage junctions. “For good conductivity, you have to have low RDSon,” said Mauder. “For the same RDSon, the area of a high-voltage mosfet is proportional to (voltage blocking)2.5 to V2.6.”
Silber at the University of Bremen originally conceived this structure as the low-voltage control element in a high-voltage transistor related to IGBTs.
IGBTs are great for silicon area as for a given blocking voltage they are far smaller than mosfets.
However, for the NEST-DC consortium, IGBTs have a fundamental limitation: heat dissipation.
“An IGBT always has p-n junction, and for silicon this will drop 0.7V. In reality, they hardly ever get below 1V,” said Mauder.
However big its junction is, if the current limiter has an 0.7V drop and is passing 100A, it is going to dissipate 70W. This means it will need a lot of room around it, and will put a significant dent in the efficiency of the system of which it is part.
“For our OCB fet, we want it to be ohmic, to have no 0.7V knee voltage,” said Mauder. So the high-voltage element has to be a jfet or a mosfet, and dissipation can now be arbitrarily low, as long as the fet channel is big enough – which is not such a big problem as fighting the V2.5 issue mentioned above – more of this later.
Mauder is proposing to use a cascode structure – see figure 3.
Originally proposed as a way to improve the bandwidth of RF amplifiers, cascode switching has really caught on in power circuits since GaN ‘hemt’ and SiC jfet power devices have appeared – both of which are depletion-mode in nature.
With a cascode, a high-voltage depletion-mode GaN or SiC transistor can be turned on and off by a far smaller low-voltage enhancement-mode silicon mosfet.
When the mosfet in Figure 3 is turned off by a control signal that pulls its gate to ground, the source voltage of the high-voltage SiC JFET rises and the JFET turns off because its gate is now negative with respect to its source.
The Si mosfet has to carry the same current as the high-voltage device, but it can be far smaller because the maximum voltage across it is the Vth of the depletion-mode transistor, seldom above 20V.
Infineon’s proposed structure replaces the cascoded low-voltage Si mosfet with the double jfet current limit – see figure 4.
Full device current still flows through the jfets but, like the cascode Si mosfet, only have to withstand the Vth of the high-voltage transistor and so can be two small low-voltage jfets.
The high-voltage transistor still needs a large area, but that is one large junction rather than two – with no gate voltage problems. And, for a given blocking voltage, both SiC and GaN transistors are smaller than their Si cousins, which is why the V^2.5 area issue diminishes. Infineon makes SiC jfets up to 1,700V.
This is a lightning-fast device and, particularly as electronic loads tend to have capacitive inputs, might get tripped-out by switch-on surges.
“There are certain strategies being investigated by partners to do filtering on this basic idea so very short transients do not trip the safety device immediately – for example some RC on the gate [in figure 4]“, said Mauder.
The whole device is a self-contained two-terminal component that does not need an external power supply and has no other inputs through which it might be damaged by external failures – which are reasons Infineon didn’t go the obvious route and combine an existing high-voltage transistor with a sense resistor and a comparator.
“Not needing any external supply for me is big advantage. What happens if the auxiliary supply fails? – Either you get uncontrolled current flow or it disconnects. We are able to do over-current turn-off without need of external current measurement,” said Mauder.
However, if more than two terminals can be accepted, Mauder has another trick up his sleeve.
SiC and GaN transistors are made on expensive processes. Could the high-voltage transistor be a simple silicon mosfet, which would also allow the whole OCB FET to be monolithically integrated?
Infineon popularised the ‘super-junction’ mosfet when it introduced its first CoolMOS branded devices. Super-junction transistors use a structural trick to reduce die area more than is possible with conventional high-voltage mosfets.
A second branch of NEST-DC is a project to further improve super-junction mosfets so they can be used to replace the SiC jfet in figure 4.
“We are investigating a new way for super-junction devices to reduce RDSon x area. State-of-the-art is 6.2Ωmm2 or even more, and we want to considerably reduce this value and chip area,” said Mauder.
Some simulations have already been done and show it is possible. “Now we have to have a closer look via simulation and experimentation. We need to retain ruggedness and avalanche capability. I have good feeling we can do that,” he said.
However, super-junction mosfets are enhancement-mode devices, so an all-silicon version would need an auxiliary supply.
“Since there is no frequent switching needed, this auxiliary supply might be a super-capacitor or something similar which could supply the gate of the high-voltage enhancement MOS over pretty long time – hours or even for days,” said Mauder.
And once an auxiliary supply is accepted, the current limit can become a switch as well as a breaker.
“In most applications, a remote access to such a safety switch is wanted anyway to use it as a conventional switching element. One could use this access to turn-on and turn-off the safety switch via charging or discharging the super-cap auxiliary supply,” said Mauder. “In case of a failure of the remote access, the safety switch still has its stand-alone capability to respond to overcurrent without additional devices or additional supply voltages [if the super-cap is charged].”
Tags: FET, Infineon