JTAG majors at Cambridge hardware design conference

JTAG Technologies is sponsoring a new UK conference for hardware development engineers will will take place near Cambridge in April.

The conference called H/WExpo will cover topics as board development, board bring up, hardware validation and production testing.

The conference is being held at Cambourne near Cambridge on the 27th and 28th April 2016.

It is free to attend for engineers and scientists working in the field of hardware development.

James Stanbridge, JTAG Technologies writes:

“This event will be an important opportunity for us to share our latest developments in boundary scan and to also introduce the concepts of JTAG/boundary scan testing to those new to the industry. It will be good to have an event dedicated to the challenges of modern hardware design and test.”

JTAG/boundary-scan is a method of testing (and programming) PCBs after assembly. Using the dedicated test logic built specific ICs, JTAG/boundary-scan checks if each device is correctly inserted and soldered onto the PCB.

The conference will present information and advice on  hardware design, memory technology, touch technology, SoC, test equipment, display technology and reference design platforms.

“At this event, I will be explaining the fundamentals of JTAG Boundary-scan,” said James Stanbridge. “The presentation will start from the beginning and explain how IEEE Std 1149.1 works and why it was developed by the JTAG committee over 25 years ago.


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