Kane offers Gidel FPGA board with 952k logic elements
Kane Computing Ltd (KCL) have announced that the Gidel ProcV PCIe x 8 (Gen3) computational accelerator board is now in production and will be available in September 2012.
The ProceV system, which is based on an Altera Stratix V FPGA, provides up to 952k logic elements. There are 34 12.5 Gb/s transceivers providing external IOs of up to 389Gbit/s.
The combination of high-speed direct communication to the FPGA via PCIe gen 3, CXP, SFP+, and general purpose physical layer interface makes the ProceV suitable for low-latency, high performance networking and HPC applications.
The memory scheme, composed of embedded memory with 8Tbyte/s throughput, 16Gbyte ECC DDR III and 288Mbit DDR II SRAM, are designed to enable high bandwidth computation and networking, and unique flexibility to achieve diverse algorithm architectures.
Using a GiDEL add-on daughtercard, the FPGA device can directly interface with standard protocols such as HDMI, SDI and Camera Link as well as with user’s propriety IO systems. Eight-lane PCIe Gen. 3 interface allows for strong co-processing between a standard PC operating system and this FPGA based accelerator.