Digital ICs

Linear retunes low noise fractional-N PLL

Linear Technology has introduced a fractional-N phase-locked loop (PLL) with 6GHz-plus integrated voltage-controlled oscillator (VCO).

The LTC6948 has a fourth order delta-sigma modulator that employs noise-shaping techniques to minimise noise contribution without creating the fractionalisation spurs typically found with fractional-N PLLs.

The chip…

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PCIM: Analog cuts power of quad-channel clock translator

Analog Devices has introduced at PCIM in Nuremberg today a multi-service adaptive quad-channel clock translator with clock multiplier, which provides jitter cleanup and synchronisation for synchronous optical networks (SONET/SDH).

Its embedded cross-point switch at the input provides greater flexibility and lower cost of ownership than maintaining…

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Programmable clock's RMS phase jitter is just 0.7ps

Integrated Device Technology has introduced a range of programmable clock generators with RMS phase jitter less than 0.7 picoseconds over the full 12kHz to 20MHz range.

As a result the devices meet the jitter requirements of PCI Express Gen 1/2/3, USB 3.0, and 1G/10G Ethernet…

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Toshiba sees need for dual mode Bluetooth

Toshiba’s latest Bluetooth v4.0 chip is a dual mode device which will support Classic as well as Low Energy (LE) Bluetooth, now dubbed Bluetooth Smart.

Target applications for Bluetooth Smart include heart rate monitors, temperature meters, remote switches or proximity sensors. But there are also likely to be…

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TI offers 2.5kV digital isolation in very small package

Texas Instruments has introduced its smallest packaged digital isolation device rated at 2.5kV rms and available in a 5 x 6mm QSOP package.

The ISO71xx range of isolation devices includes six triple and quad devices based on integrated silicon dioxide capacitors and provide both resistance to electromagnetic interference (EMI…

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IDT clock fanout buffer for JESD204B in LTE basestations

Integrated Device Technology’s first clock fanout buffer supporting high-speed JESD204B clocking is fabricated in silicon-germanium (SiGe) technology.

It is designed to distribute high-quality clock and system synchronisation reference (SYSREF) signals to data converters in GSM, WCDMA and LTE basestation radio cards.

The 8V79S690i supports frequencies such…

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IDT chip boosts performance of PCIe 3.0 on 16 channels

Integrated Device Technology has introduced its first 16-lane PCI Express 3.0 signal-conditioning retimer.

The retimer is designed to improve PCIe performance and reliability by restoring signal quality across long or noisy connections in computing, storage, and communications applications.

The IDT 89HT0832P is a 32-channel (16-lane…

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Chip-to-chip links run at 28Gbit/s with 28nm PHY IP

Semtech’s Snowbush IP group has developed a PHY for implentaion on 28nm CMOS capable of supporting CEI 28Gbit/s chip-to-chip and chip-to-module data links.

The PHY IP is likely to be used in ICs supporting emerging Exascale computing, Terabit networking, and Petabyte storage markets. The…

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