ADI selects Cortex-M4 and model-based design for motor control
The floating-point Cortex-M4 processor core runs at 240MHz and ADI has also integrated a dual 16-bit A/D converter with up to 14 bits of accuracy and 380ns conversion speed.
ADI’s previous motor controller platform was based on its own ADSP-BF506A Blackfin processor, but it has realised that the Cortex-M4 was quickly becoming the de facto standard architecture for accurate control systems.
“The industry is moving away from proprietary architectures and we realised the industry standard core for motor control was the Cortex-M4,” said Tim Resker, product marketing manager at ADI.
Resker also believes that model-based design tools such as Simulink from the MathWorks are now becoming important in the development of control systems for motors and PV arrays.
“We know we now need to become experts in the use of these tools,” said Resker.
Two years ago ADI demonstrated its first motor control system design platform, based on a Blackfin processor, using the MathWorks Matlab computing language for algorithm development.
It also implemented the Simulink design environment for the deployment of control algorithms to optimise the efficiency of permanent magnet synchronous and ac induction motors.
The intention was to allows designers to model their system in Matlab/Simulink, generate the C code, and deploy with Analog Devices’ Visual DSP++ Design Environment with bandwidth remaining for application code.
ADI believes that the use of model based designs can improve the drive efficiceny of sensorless and sensored motor control algorithms, and it has worked with the MathWorks to apply the Simulink model-based design tool and code generator to its motor control platform. It uses the MathWorks’ ARM Cortex-M optimised Embedded Coder and tool suites to support the complete design cycle from simulation to product-ready code implementation in an embedded platform.
Simulink generates optimised C code which runs on the Cortex-M4 based platform. The company has also increased the on-chip memory to 384kbyte of SRAM to hold the C code generated by the tool.
The ADSP-CM40x has control loop specific hardware accelerators, a full sinc filter implementation to interface directly to isolated sigma-delta modulators which are used in shunt-based current sensing system architectures. Typically, the sinc filter would have been implemented in an FPGA.
There is also a DSP accelerator providing harmonic analysis typically used in PV array control loop design.
It is also capable of scalable and dynamically adjustable PWM.Tags: filter implementation, motor controller, pv arrays, standard architecture