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The latest Electronics Weekly product news on FPGA (field-programmable gate array) and PLD (programmable logic device) devices to be (re)configured by a user after manufacturing.

Achronix board delivers acceleration for data centres


Achronix has announced availability of the new PCIe form factor Accelerator-6D accelerator board which is the industry’s highest single-FPGA memory bandwidth, PCIe add-in card for high-speed data center acceleration applications. The board integrates a Speedster 22i HD1000 FPGA with 700,000 look-up-tables that connects to six independent memory controllers allowing for up to 192 GB of memory and 690 Gbps of ...

Updated: Micro-sequencing crams 8051 into tiny FPGA space

MicroCore Labs MCL51

Californian start-up MicroCore Labs has announced an 8051 soft processor core, four of which will fit into 1227 LUTs on a Xilinx Artix-7 FPGA. The core is called MCL51. “Because it is based on a microsequencer, this four-core demonstration is even smaller than a single soft-core gate-based 8051,” the company founder, known simply as Edward, told Electronics Weekly. “The execution unit of ...

Sundance adds Xilinx Ultrascale FPGA to EMC-2 boards


Sundance Multiprocessor Technology Of Chesham has integrated Xilinx’s smallest Kintex UltraScale FPGA with its EMC2-family of embedded boards for the “OneBank” PC/104-compatible format. Sundance’s EMC2-family is a range of industrial-grade and deployment-ready PC/104 boards that feature either a Xilinx Zynq SoC or Xilinx Artix/Kintex FPGAs. The EMC2-KU35 is the latest member and has two banks of 16-bit DDR4 with close ...

Lattice bridge IC brings mobile display interfaces to industrial apps


Lattice Semiconductor has addressed the issue of multiple image sensor and display interface protocols with an FPGA-based bridge chip. Essentially, the device, called CrossLink, is a video interface bridge with a fast MIPI D-PHY capability that delivers up to 4K ultra-HD resolution at 12Gbit/s bandwidth. Protocols supported include MIPI D-PHY, MIPI CSI-2, MIPI DSI, MIPI DPI, CMOS, SubLVDS and LVDS.

FPGAs get Hitless I/O for in-system hardware upgrade


Lattice semiconductor has added to its MachXO3 family of FPGAs with the addition of the MachXO3L-9400 and MachXO3LF-9400 devices available in multiple packages. The new FPGAs offer expanded I/O and logic support for control PLD applications, while increased on-chip memory improves picture clarity for low cost video bridging in large monitor applications, says Lattice. Features include: Glue-less 1V I/O interface for ...

Xilinx and IBM put big data FPGA design in the cloud

Xilinx chip

Cloud-based FPGA design is the focus of a tie-up between Xilinx and IBM. IBM’s cloud service will host the Xilinx SDAccel development environment which will allow developers to describe their algorithms in OpenCL, C, and C++  and then compile directly to Xilinx FPGA-based acceleration boards. This is an open access cloud service, called SuperVessel,  which can be used by application developers, ...

Cryptographic keys protect production FPGAs, says Microsemi


Microsemi has introduced a secured production programming capability for its FPGAs. The firm uses hardware and software to generate and inject cryptographic keys and configuration bitstreams into its FPGAs as a preventative measure against cloning, reverse engineering, malware insertion or leakage of sensitive intellectual property (IP). Called SPPS, the security package includes the use of “customer” and “manufacturer” hardware security ...

Xilinx: finfets deliver 56G PAM4 transceiver

56G PAM4

Xilinx, has developed 16nm finfet-based 56G transceiver technology using the 4-level pulse amplitude modulation (PAM4). “PAM4 solutions will help drive the next wave of Ethernet deployment for optical and copper interconnects by doubling bandwidth on the existing infrastructure,” said the firm. The company’s 56G PAM4 transceiver technology has been developed to tackle physical limitations of  data transmission at such line ...

Kit for getting started with secure FPGA design

Microsemi PUF

Avnet has updated its design software offering for Microsemi’s SmartFusion2 KickStart development kit to offer a data security demonstration. The kit, sold exclusively through Avnet, is an entry-level development platform designed to facilitate prototyping using Microsemi’s SmartFusion2 system-on-chip FPGAs. The development board integrates a single event upset (SEU)-immune SmartFusion2 SoC FPGA, a secure and integrated programmable device with 10,000 logic ...

Xilinx ships 16nm Virtex


Xilinx is shipping a 16nm finfet Virtex UltraScale+ FPGA made on TSMC’s 16FF+ process. Xilinx says it is actively engaged with more than 100 customers on the UltraScale+ portfolio with design tools, and has already shipped devices and/or boards to over 60 of them. The devices join the Zynq UltraScale+ MPSoCs and Kintex UltraScale+ on 16nm. Virtex UltraScale+ devices are aimed at ...