The adaptive DDR4 IP dynamically tracks and adjusts the critical DDR timing interface to allow the DDR4 SDRAM to be clocked at a higher rate without sacrificing the stability or integrity of the DDR memory subsystem.
"We're pleased with the performance results and collaborative relationship we've built with Uniquify," says JH Oh, v-p and head of DRAM product planning and enabling at SK Hynix.
"Working together, we've shown that it is possible to achieve enhanced DDR performance by coupling our latest DDR4 SDRAM technology with Uniquify's adaptive DDR4 IP."
"Design teams now have the competitive advantage to lead their markets with an ultra-performance DDR memory interface that is also reliable and resilient because of our adaptive DDR IP," said Josh Lee, chief executive officer of Uniquify.
LPDDR4 is the latest generation of the high speed memory standard, designed to combine high data throughput with power efficient operation for smartphones and tablets.
The JEDEC standards body is expected to publish the specification this year.
“Memory is playing an important role in the increased functionality and performance of mobile devices such as smartphones and tablets,” said Mian Quddus, chairman of the JEDEC board of directors.
“LPDDR4 and Wide I/O 2 are key new standards for memory interfaces,” said Quddus.
LPDDR4 will effectively double the data bandwidth of its predecessor LPDDR3.