Mentor, ST and CEA-Leti part of French chip research plan
The French government is supporting the creation of a semiconductor research centre in Grenoble.
The Grenoble-based Institute of Technological Research (IRT) will be the centre for the NanoElec Programme, a collaboration between universities, research organisation CEA-Leti and companies including Mentor Graphics, STMicroelectronics and Soitec.
Backing for the 10-year microelectronics programme has come from the French National Research Agency (ANR) and the CEA (French Atomic and Renewable Energy Commission).
According to Jean-Marie Saint-Paul, European director at Mentor Graphics, the research in Grenoble is important for local universities and companies because it will focus on emerging semiconductor technologies – 3D IC integration and integrated silicon-photonics.
“We feel the industry faces challenges, not only in smaller geometries, but in stacked die and 3D IC technologies,” Saint-Paul told Electronics Weekly.
“We believe we cannot solve these problems in isolation, and so it is important to collaborate with customers in the Grenoble programme,” said Saint-Paul.
According to Saint-Paul, the French government wants to create a semiconductor cluster.
“It is a very aggressive approach to semiconductor research, the French government wants to see tangible results,” he said.
“For us we see it as an opportunity to work closely with ST and CEA-Leti on 3D ICsand silicon photonics,” said Saint-Paul.
He said that Mentor had been collaborating with ST since 2007in the Nano2012 project based at the Crolles semiconductor facility.
That project ends this year and Saint-Paul said the new programme will build on this work of this collaboration in France.
The IRT’s 3D IC programme will incorporate chip design, process technologies and design tools.
On-chip communications and sensors technologies will be a focus of the silicon-photonics R&D work at the IRT.
According to Saint-Paul, although the creation of the cluster in Grenoble is a 10-year project, he expected commercial results from the work in “3-year cycles”.
There are still many technical challenges to be met before successfully achieving photonic functions on a silicon circuit: providing CAD design tools, developing specific components like laser sources, optical modulators, wide bandwidth photo-detectors, passive waveguides, wavelength multiplexers and demultiplexers.
“Thanks to the NanoElec IRT, we can work together to accelerate developments and open the applications field,” said Philippe Magarshack, STMicroelectronics v-p, Design Enablement & Services.
“I am delighted with the collaboration with Mentor Graphics, whose expertise in computer-aided design (CAD) tools will be able to make CEA-Leti and STMicroelectronics’s advanced technological achievements better available to systems and applications designers” said Laurent Malier, CEO of CEA-Leti.
The NanoElec IRT is supported by CEA-Leti in partnership with manufacturers such as STMicroelectronics, Mentor Graphics, Soitec, Schneider, STEricsson, Bouygues, Presto Engineering and INEO, the Minalogic international competitive cluster, the Grenoble INP Institute of Technology teaching and research school, the Grenoble Ecole de Management school, the Joseph Fourier university, the INRIA (National Institute for Research in Computer Science and Control), the CNRS (National Center for Scientific Research), the Laue Langevin Institute, and the ESRF (European Synchrotron Radiation Facility).