Qinetiq and Intel parade InSb Fets
Qinetiq and Intel have collaborated on novel III-V ‘quantum well’ Fets they claim could both reduce power and increase speed in logic circuits.
The researchers said the indium antimonide (InSb) transistors can function at a similar speed to state-of-the-art silicon Mosfets, while dissipating between one-fifth and one-tenth of the power.
“We first developed indium antimonide transistor technology as part of a UK Ministry of Defence project,” said Tim Phillips, business manager of the Fast Transistors Group at QinetiQ.
“And although this research is still in the initial phase it shows huge promise for advanced applications.”
The ‘depletion mode’ NMOS devices have a channel length of 0.2µm and exhibit an fT of 150GHz at VDS=0.5V. They are built on a complex layered substrate and show a whopping electron mobility of 30,000cm²/Vs at 295K.
Too many carriers raise leakage
The III-V semiconductor InSb is well known to have very high electron mobility, but the large number of intrinsic carriers make it difficult to build devices with reasonable leakage.
In order to take advantage of the potential of InSb for fast, low-power Fets, Qinetiq has for several years been developing technology to extract excess carriers from the material, and has been working with Intel to use its enabling technique for devices.
Philips sad that, since low-noise amplifiers or small DSP devices would be more reasonable nearer-term goals, the fact that Intel is the collaborator might be found surprising.
“Intel weren’t a company we had top of our list, [but] the advantage is they have a really big research budget, and they are very, very forward looking,” he says. “The thing we’re focused on with them is moving this towards something that could be used in a microprocessor as soon as possible. That’s reasonably long term – probably eight to ten years out.”
The key challenge now is to improve the manufacturability of InSb devices. Although they are GaAs compatible, and use the same epitaxial growth techniques, Philips says “the lower standard of investment and reproducibility, and even the size of [GaAs] wafers available, is still a challenge and is something we’re looking at at the moment.”
The research made public today was originally reported to a closed symposium at the International Conference on Solid-State and Integrated-Circuit Technology in Beijing last year.