IEDM – News Roundup
We roundup all the latest news and developments from the International Electron Devices Meeting 2011 (IEDM 2011) in Washington DC.
The IEEE describes it:
“It is the world’s pre-eminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. IEDM is the flagship conference for nanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices, novel quantum and nano-scale devices and phenomenology, optoelectronics, devices for power and energy harvesting, high-speed devices, as well as process technology and device modeling and simulation.”
Thursday 08 December 2011
IEDM: Deeply depleted channels run SRAM at 0.425V
Fujitsu has demonstrated SRAM blocks down running down to 0.425V, using a deeply depleted channel (DDC) transistor design from Californian start-up SuVolta.
IEDM: III-V finFET
An Intel-led team has made quantum-well finFETs from InGaAs, with 30nm gates, “that deliver the best electrostatic performance of any III-V mosfet”, said the IEEE. “Until now, the III-V mosfets which have delivered the best performance have been of the ultra-thin-body planar type, scaled to around 10nm gate lengths.”
Wednesday 07 December 2011
IEDM: Hollow through-silicon vias ease expansion issues
IBM is partially-filling through-silicon vias (TSVs) to side-step potential stress problems created when TSVs are completely filled with copper.
IEDM: FinFET carrier profiles scanned with 3nm resolution
Researchers from Katholieke Universiteit Leuven have mapped 3D carrier profiles within a finFETs at a resolution of 2-3 nm, an industry first, claims the IEEE.
IEDM: 10 year phase-change RAM on 84nm pitch
Hynix has created a complete technology platform for fast, dense non-volatile phase-change RAM (PCRAM).
IEDM: Etch away nanometre Ge-on-Si defects
Researchers from Taiwan’s National Nano Device Laboratories are looking to etch away defects that form when nanometre germanium transistors are built on silicon substrates.
IEDM: Ultimate scaling gets to 5nm
A Purdue University-led team decided to try to find out just how far current scaling techniques will stretched, and reached 5nm.