Tech news tagged ‘fpga’

Microsemi gets auto qualification for ARM-based FPGAs

Microsemi says it has got auto qualification, AEC-Q100 grade 2, for its ARM-based, flash FPGAs and these will be on the market next month.

The ICs offer single event upset (SEU) immunity which gives protection from neutron-induced firm errors, achieving zero defect rate.

Microsemi targets them at…

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Altera returns to its FPGA roots with Stratix 10

Altera has returned to its roots with its latest Stratix 10 FPGA family.

The performance figures of this device are certainly impressive. It reminds me of the days when FPGAs were only ranked by their gate count process technology and clock speed.

This was before suppliers felt they had to…

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FPGAs for big space satellites

Microsemi has introduced a range of radiation-tolerant FPGAs intended for space applications requiring up to 150,000 logic elements and up to 300MHz of system performance.

Typical uses for RTG4 include remote sensing space payloads, such as radar, imaging and spectrometry in civilian, scientific and commercial applications.

Other applications…

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5G Millimetre wave platform uses Xilinx IP

A 5G development platform for millimeter wave (mmWave) modems will be demonstrated at Mobile World Congress, writes Richard Wilson.

It is the result of a joint development between Xilinx and communications hardware specialist BEEcube.

Mobile World Congress: Your Electronics Weekly guide »
“5G will increase cellular network capacity by a factor…

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Comment: FPGAs must be protected from being cloned

We have historically experienced that while every technological advance brings its own fresh opportunities; it also creates an additional series of technological challenges for system designers.

They must develop new products while addressing issues, such as power consumption, reliability, and especially security.

In our hyperconnected world, it is essential that…

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Microsoft shows FPGAs meet performance/watt targets

The most aggressive efforts of microprocessor vendors to shrink feature sizes, move to new FinFET processes, and add special power-saving states to CPUs, have not been enough to deliver the performance and power requirements of an increasing number of applications which are handling large amounts of data at increasingly…

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FPGA design improved by correct setting of clocks and timing constraints

In FPGA design, where timing is everything, there are tips and tricks to help designers set up clocks, correctly set timing constraints and then tune parameters of the FPGA, write Angela Sutton and Paul Owens.

When your FPGA design fails to meet timing performance objectives, the cause may not be…

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ESA orders space radio prototype from RFEL

Following a research contract, the European Space Agency is to buy a software-defined radio demonstrator RFEL, the Isle of Wight-based specialist in DSP algorithms running on FPGAs.

“The research element of the project was a great success,” said RFEL CEO Alex Kuhrt, “so this second, follow-on, contract…

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In FPGA design timing is everything, says Synopsys

When your FPGA design fails to meet timing performance objectives, the cause may not be obvious. The solution lies not only in the FPGA implementation tools’ talent in optimising the design to meet timing, but also in the designer’s ability to specify goals upfront and diagnose and isolate timing…

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