Posts Tagged ‘fpga’

Lattice cuts cost of remote image sensor systems

Lattice Semiconductor has introduced a reference design for remotely locating image sensors up to eight metres away from the image signal processor (ISP) and transmit and receive video signals at resolutions that range up to 720p60 and 1080p30.  Developed with cost reduction in mind, the reference design, called SensorExtender, uses…

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TI image sensor will replace an FPGA

Texas Instruments has designed an image sensor receiver chip that can be a LVDS bridge between image sensors and processors. Effectively removing an FPGA from a design, the SN65LVDS324 provides full HD, 1080p60 image quality. In 1080p60 system implementations, the device typically consumes less than 150mW, said the supplier. Likely…

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Altera targets FPGA designs at smart grids

Altera has introduced an FPGA-based reference design for smart grid substation automation equipment.

Developed jointly with wireless networks firm Flexibilis Oy, the IEC 62439-3-compliant reference design includes Flexibilis Redundant Switch (FRS) intellectual property implemented on a Cyclone-class FPGA or Cyclone V SoC.

The reference design implements…

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Electronics patent of the month: Anti retail-theft RFID antenna and reader

GPS with an accuracy of 2m has been developed by researchers at Carlos III University in Madrid. The researchers added three gyroscopes and three accelerometers to a conventional GPS system to pinpoint the position of cars in cities to within 2m. Unaided GPS has an accuracy of 50m in cities…

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White space transceiver from Cambridge

Neul has announced its first transceiver chip for ‘white space’ communications in 470-790MHz UHF TV bands. Called Iceni, the chip is intended for secure non-line-of-sight machine-to-machine (M2M) communications. Both 6 and 8MHz channel bandwidths are supported, and “adaptive digital modulation schemes and error correction…

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Cambridge design firm joins Xilinx alliance

Cambridge-based design house Plextek has joined the Xilinx Alliance Program. The programme is a worldwide ecosystem of companies which have been audited by Xilinx and whose engineers have had specific training, said Plextek: “Certified members have passed a 320 point review of their technical, business, quality, and support processes…

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Electronica: Xilinx unveils 20nm roadmap

Xilinx has given first details of its product plans for the next process node at 20nm. The FPGA and system-on-chip (SoC) supplier will move its next-generation 8 series all-programmable FPGAs, its Zynq ARM-based SoCs and its 3D ICs to 20nm, starting next year. Xilinx is…

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Altera offers OpenCL design kit for parallel processing

Altera has announced its first software development kit (SDK) for OpenCL (Open Computing Language) which brings a parallel programming model to the supplier’s FPGAs for the first time. The SDK allows system developers and programmers familiar with C to develop their FPGA-based applications in a high-level language…

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RFEL says Zynq will widen FPGA apps

RFEL believes design with Xilinx’s Zynq-7000 28nm ARM-based system-on-chip will widen application of FPGAs. “Making Zynq-7000 SoC design consultancy part of our service offering,” said Dr. Alex Kuhrt, RFEL’s CEO, “allows us to offer support to engineers and project managers who wish to…

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Most powerful mini-8051?

Polish IP firm Digital Core Design has put an 8051 CPU into under 3,000 asic gates, claiming it to be the most powerful at this size. “A very low gate count area allows as well to run the core at high performance, up to 300MHz in Hynix 0.18…

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