The µPD809400 is a system on chip (SoC) system that can reduce material costs for mobile devices while enabling lower power consumption and convenient display panel configurations. Fabricated with 90-nm process technology, it integrates large memory, timing control circuits as well as regulators and other analog circuits.
Features of the new chip include:
By reducing both power consumption and device part costs, while delivering high-resolution VGA graphics, the new product will help designers meet two of the most important goals in the competitive mobile market. Various techniques are available to reduce component costs and power consumption in mobile devices. For example, in the current generation of mobile phones, the application processor accounts for a significant part of both cost and power consumption.
With the trend toward higher resolution, the application processor must integrate more memory for graphics data, which increases the size and cost of the chip. The application processor also requires a continuous supply of power in order to transfer the data to the LCD panel. By inserting the new chip between the application processor and an LCD driver IC, designers can choose a less costly application processor and implement new power saving strategies, thus reducing the overall system cost and power consumption.
Main features
Eight megabits of on-chip DRAM - DRAM can be fabricated with a cell size about 1/3 as large as that of SRAM. Compared to an SRAM memory macro fabricated with a same-generation process, an eDRAM macro occupies about only about 1/4 to 1/5 of the area when integrated into an application processor. This is why it was possible to provide eight megabits of on-chip DRAM in a package measuring only 5 x 5 mm. This is enough memory to display 24-bit full color VGA (640 x 480 pixels) on an LCD panel.
Integrated graphics processing logic - Integrated graphics logic circuits provide functions such as image rotation and reversal of the horizontal/vertical aspect ratio. The chip is also capable of expanding QVGA data for display on VGA screens.
M-CMADS 3000 display panel interface - The new chip supports the NEC Electronics M-CMADS 3000 a high-speed serial data transfer interface that reduces the number of transmitter lines while suppressing electromagnetic interference (EMI). When paired with a LCD driver IC such as the NEC Electronics µPD161842, it is an ideal solution for pivoting or sliding display designs, because it reduces the number of transmitter lines to only 6, compared to the 27 required by a conventional parallel interface. The low EMI noise makes it possible to eliminate parts such as transmitter line EMI filters, for lower part counts and more compact designs.
With its 8 megabits of eDRAM memory and integrated graphics logic, the new chip is an innovative system. Since introducing its first eDRAM products for the 180-nm process, NEC Electronics has shipped more than 100 million eDRAM products. NEC Electronics intends to continue to expand its lineup of eDRAM products for mobile and other applications.
Availability
Samples of the new chip are available now. Volume production will start in August 2008, and is expected to reach 2 million units per month in 2009.
More information: www.necel.com
Detailed specification of µPD809400
Input Interface: RGB parallel I/F
SPI channel
CPU parallel I/F
Embedded Memory: 8Mbit (eDRAM)
Resolution: Flexible. Up to 24bit-full color VGA
Input clock: 32.768kHz or 19.2MHz
Output clock: Mobile CMADS 3000 (compatible with FlatLink 3GTM)
Image processing functions: Landscape/portrait display support
Double Buffering
Pixel doubling (QVGA→VGA)
Power supply voltage: 1.8V±0.15V
Power consumptions: 48mW (30fps 24bit VGA input, 60fps display refresh)
190µW (at the sleep mode)
Packaging: 64-pin FPBGA (5mm x 5mm)
Analog Devices
Ericsson Power Modules
Linear Technology
Lorlin
Maxim Integrated Products
Powerstax
Saft
Schaffner
Vishay Intertechnology
Yokogawa