The third generation of its ECP family continues the company's strategy of offering low power consumption FPGAs for highly targeted wireless comms, video and Ethernet applications.

The claim is they are up to 50% lower power than the previous generation ECP devices.
The devices will support multi-protocol 3.2Gibt/s serdes with XAUI jitter compliance, DDR3 memory interfaces and up to 149k LUTS.
The FPGAs are manufactured using Fujitsu's 65nm process technology.

At around $35-$50, these are mid-priced devices. "This is the main FPGA market right now," said Shakeel Peera, director of marketing at Lattice.

There FPGA's data processing performance is scalable using cascadable DSP slices, which Lattice said will allow the devices to be used for some higher end applications such as baseband and image signal processing.

Toggling at 1Gbit/s, the chips feature a fast LVDS I/O available and there is up to 6.8Mbit of embedded memory.
Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O.

See www.latticesemi.com