Goepel electronic has introduced a model library for ARM Cortex-M3 architecture processors to support the VarioTAP emulation technology.

The libraries, described as VarioTAP models, are structured modularly as intelligent IP and enable a complete fusion of Boundary Scan test and JTAG emulation.

In this way embedded or external flash can be in-system programmed via the native processor function. VarioTAP also supports interlaced Bus Emulation Tests (BET) and System Emulation Tests (SET) for extended JTAG/boundary scan functionality.

All possible scan chain configurations from stand-alone operations, mixed operations with other JTAG devices up to the utilisation of scan routers are supported.

The adaptive streaming technology of the TAP signals allows emulation tests to be carried out in parallel or interactively to boundary scan tests within a test program. 

With the supplier's Scanflex platform, for example, up to eight TAP can be controlled independently and simultaneously to other I/O resources.

In the flash programming, embedded and external flash are supported. The script generation is done automatically. In addition to dynamic testing of externally connected components such as RAM or I/O resources, the IP functions for bus simulation and system emulation enable the functional testing of on-chip interfaces as well as the execution of customer defined program codes.