Analog Devices has expanded its clock-chip range with the AD9552 oscillator frequency upconverter and the AD9547 clock synchroniser.

The AD9552 is a fractional-N, PLL- (phase-locked-loop) based clock generator. Designed to replace voltage-controlled oscillators, the upconverter requires either a single-ended, low-frequency reference signal or a crystal reference to establish the higher output frequency the IC generates.

It provides jitter of under 0.5ps operating with input frequencies in the range of 50kHz to 80MHz. The device can generate almost any desired output frequency up to 900MHz.

Power consumption is specifiedf as less than 400mW in a  5x5mm package.

The latest clock synchroniser, the AD9547 has 66% better jitter, 100 times narrower loop-filter bandwidths (as narrow as 1 milliHertz) with twice as many inputs and outputs as its predecessor. It also supports Stratum-2 level holdover.

The AD9547 provides synchronisation for many systems, including synchronous optical networks (SONET/SDH). The digital PLL reduces input time jitter or phase noise associated with the external references

The AD9547 continuously generates a clean, low jitter, valid output clock, even when all references have failed, by means of digitally-controlled loop and holdover circuitry.