Current sink stability

The idea is that feedback around the op-amp makes it impose Vin across the source resistor, and this current has to come from whatever is connected to the mosfet drain.

However, the thing has a tendency to oscillate.

With an npn or npn/pnp Sziklai pair, by default the circuits seem to work well, so more than once I have just removed the mosfet and replaced it with a bipolar answer to get the job done – particularly as the Diodes (Zetex) matrix bipolar transistors only need a tiny base current and are therefore only 1% less efficient than a mosfet.

Anyway, I though I would have a better look and googled to find two excellent information sources, one on Electrical Engineering StackExchange linking to the other by Analog Devices.

Both tackle the issue in terms of poles and zeros – a skill which has sadly waned in me.

While Miller (drain to gate) capacitance might be responsible for MHz oscillation, both articles point the finger at gate-drain capacitance as the source of kHz oscillations, working with the amplifier output resistance to decrease phase margin.

The resistor dotted in the top diagram might get the better of the problem sometimes, but the circuit to the left looks to be a more elegant answer, retaining more agility. The R-C series snubber (not pictured) is also interesting.

And, recognising this is a horrendous cop-out, at the very minimum there will be enough pads on the pcb if I implement the circuit on the left to randomly add 100pf capacitors and resistors until the thing behaves.

Time to brush up on the works of Mr Bode……

A bit later….

It transpires that Linear Tech liked the compensation circuit on the upper left too, in its Application Note 105. In these cases, op-amps are chosen to have inputs and outputs that work near the appropriate rail.