Other reasons are to make the best use of the dynamic range of your ADC if it has a bipolar input, or to generate a mid-rail bias voltage in a single supply rail system. Whatever the reason, this article collects together a variety of different techniques that can be used, including some more unusual ones.
Some of the techniques given have a small footprint with low number of external parts, or a low quiescent current.
There are several different meanings of the phrase “rail splitter.” The usual meaning is creating a new “0V” reference point, usually the mid-point Vdd/2 of a single supply rail Vdd.
The available voltage remains the same as before, only you can view it as being distributed as a bipolar supply ±Vdd/2 about the new “0V” reference. A linear conversion is often used to generate Vdd/2, but a switched-mode conversion can also be used for high output power.
The new “0V” can be called a “virtual ground.” Figure 1 illustrates the concept, where an input voltage is divided by two and buffered to give Vout.
Another type of rail splitter takes a single rail Vin and splits it into bipolar outputs, ±Vout. For example, 3.3Vin might be “split” into ±5Vout. Such a process is usually done using two switched-mode conversions, often a boost plus a buck-boost regulator.
A third type produces a negative output from a positive input, for example creating –5Vout from 5Vin, to give a ±5Vout bipolar supply. (It could be argued that a different terminology should be used, as these circuits don’t create a new “0V,” so they aren’t virtual ground circuits.)
A rail splitter that creates a new virtual ground must be able to source or sink load current and it must be stable with capacitive decoupling load on its output.
A resistor divider could be used to split a rail but you are at the mercy of the impedance of the resistors, so this technique is of limited use, but is suitable for supplying high impedance loads such as non-inverting op-amp inputs. This article looks at the options for making low impedance “rail splitters.”
A classic rail splitter IC such as the TLE2426 takes an input voltage (IN) of between 4 and 40V and provides a buffered output of OUT = IN/2, Figure 1.
The IC has a quiescent current of 170μA and a low output offset of 100μV within the +/-10mA load range. The IC is stable with capacitive loads over a specified range given by the graph in the datasheet.
Source/sink DDR termination regulators
A limitation of the TLE2426 is that its minimum Vin is 4V and this makes it unsuitable for designs with a lower Vin, as are common today. TPS51200 was designed for DDR memory termination applications and supports sourcing and sinking current. It is rated over -40 to +85°C and there is an automotive version TPS51200-Q1 rated over -40 to +125°C.
The IC accepts a VLDOIN of between 1.1 and 3.5V which it divides down and the buffered output is available on the VO pin. VO can range from between 0.5 and 1.8V. The IC also needs a 3.3V or 2.5V VIN supply for itself. The division factor is programmed by the voltage on its REFIN pin, which is often achieved using a resistor divider off the VLDOIN input.
Like the TLE2426, the output is not regulated, but depends on and tracks the REFIN voltage. A filter capacitor across the resistor divider provides some higher-frequency ac disturbance rejection. The lack of regulation need not be an issue if the VO is used as a common mode voltage throughout the system, including the ADC.
If the ADC is a true or pseudo differential input type, then this common-mode voltage appears on both inputs and is rejected by the common-mode rejection ratio (CMRR) of the ADC. TPS51200 has a current limit of > 3A and comes in a QFN thermally enhanced package, to permit higher output currents.
The recommended ceramic output capacitors with combined esr < 2mOhms must be placed as close as is possible to the VO pin, on the same side of the PCB as the IC. See the datasheet section “Layout Considerations.”
For even higher source/sink capability, then a dc/dc switch mode DDR termination regulator can be used, TPS53317 which is capable of ±6A. It supports Vin from 1 to 6V and outputs between 0.6 to 2V. It uses DCap+ control which is designed to react quickly to load transients.
The IC requires an auxiliary 5Vin to supply itself. Its output is regulated to its own internal 2Vref when in non-tracking mode, or by applying a voltage to the VREFIN pin it can track the voltage on that pin during start-up and thereafter.
Sometimes a very small, low power rail splitter is required. A battery-powered or energy harvesting application for example might require this. Some voltage references are capable of sourcing or sinking current and most are stable with capacitive load. Table 1 shows the options. In the table, 1.25V output devices are shown for the REF3xxx, but there are other voltage options available.
Splitting a rail using the voltage reference will often mean compromising a bit on the symmetry of the split, for example, if a 3V3 rail is to be split then the closest would be to use the 1.8V output reference, which gives a +1.8/- 1.5V asymmetrical supply. Only the REF3318 is available with a 1.8V output, so it could be used.
The REF19xx and REF20xx voltage references include a second, buffered, split rail output specifically for the purpose of biasing signal chain devices at one-half of its main reference output. For example, REF1930 provides a 3V main Vref output plus a buffered 1.5V output. There are other voltage options released.
Op-amp rail splitter
The basic approach is to divide a rail in two using a resistor divider and buffer it with an op-amp configured for non-inverting unity gain, like Figure 1. However, using a generic op-amp to split the rail is to be approached with caution, as many op-amps are unstable with capacitive load and even more so in the unity-gain follower configuration.
Devices like LPV521 can be used, but the amount of capacitance that can directly be placed on the output is limited and the datasheet details the phase margin when capacitance is added. More load capacitance can be added to many op-amps, provided it is isolated from the output via a series resistor.
This technique is shown in the LPV521 datasheet, plus the RC snubber method of improving phase margin. There are six ways to compensate an op-amp design where capacitance is being driven and this has been covered already.
Some op-amps like those beginning LM8x or LM7x in Table 2 feature unlimited capacitive drive capability due to their architecture. BUF634 is included because it can be used inside the feedback network of a precision op-amp to make a composite op-amp – a device that has high precision and high output drive capability. Still, care must always be taken when driving a capacitive load.
The LM7705 negative bias generator accepts a 3 to 5.25V input and provides a unique -232mV output at up to 26mA. Its purpose is to be used in single rail applications, where the op-amps are required to drive all the way down to 0V on their output.
In single rail supply designs, even so-called rail-rail output op-amps always saturate above 0V. LM7705 solves that by providing a small negative supply rail to allow the op-amp output to hit 0V.
As supply rails become lower, then the need to make full use of the voltage rail becomes more pressing. The IC is a charge-pump regulator with additional pre and post regulation stages to give a low 4mVpkpk ripple on its output.
Inverting charge pump-based approach
Simple inverting charge pumps like the TPS60400 family create an inverted output of the same magnitude as their input voltage. The regulation of the output is not very good and so they can be followed by a negative output, high power supply rejection ratio (PSRR) LDO like TPS72301 to increase regulation and attenuate noise.
The TPS6040x are also available automotive qualified as TPS6040x-Q1. If you have already used another dc/dc converter in your circuit then you can use its switching node and discrete capacitors and diodes to create a low power charge pumped output.
Buck-boost negative supply generators
TPS63700 accepts a Vin of 2.7 to 5.5V and can produce a Vout between -2 and -15V. The topology used is a buck-boost converter with a fixed switching frequency of 1.38MHz. The typical switch current limit is quoted as 1A and this should not be confused with the available output current.
The maximum available output current (Iout) for a given MOSFET current limit (Iq) is approximately Iout = ƞ x (1-D) x (Iq – Iripple/2) where ƞ is the efficiency, Iripple is the peak-peak ripple current and D is the duty cycle given by D = Vout / (Vout – Vin). When performing this calculation it is best to use the value of the minimum Iq given in the datasheet, which is 0.86A. The datasheet also gives curves of the maximum Iout over Vin and Vout.
The PCB layout shown in the User Guide for the evaluation board should be followed closely. In low noise applications, to remove very high frequency noise on any dc/dc converter output you can follow the output with a bead inductor LC filter.
For very small solution sizes, LMR70503 accepts a 2.8 to 5.5Vin and produces a -0.9 to -5.5Vout. The available output current depends on the Vin and –Vout selected and at 3.3Vin and -5Vout it is about 75mA.
A comprehensive set of design equations was developed in an applications note for the TPS54160A, 1.5A 60Vin buck converter IC. It uses a coupled inductor to generate, for example, ±12V from a single 24Vin.
For very low noise bipolar supplies for powering sensitive analogue components, then the outputs of the dc/dc conversion can be followed by high PSRR, low noise, wide Vin LDOs.
For the negative rail then TPS7A3001 (0.2A) or TPS7A3301 (1A) can be used and for the positive rail then TPS7A4901 (0.15A) or TPS7A4700 (1A). Higher currents can be handled by the TPS54260.
Dual Split-Rail Supplies
This approach can be used when bipolar supplies are required from a single supply input, provided the load currents are modest. The power dissipation in all dc/dc converter designs should always be computed as ICs cannot usually deliver maximum output power under all conditions. The efficiency graphs in the datasheet can be used to help compute the power dissipated (Pd) per rail for a given output power (Pout), Pd=(1/ƞ – 1) x Pout, where ƞ is the efficiency.
Written by Dan Tooth, senior analogue FAE at Texas Instruments