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An industry group aimed at developing standards to aid a ‘design-for-debug’ methodology had its inaugural meeting here at DAC.


Members of the Design-for-Debug (DfD) Consortium are of the opinion that putting standards in place will enable people to use familiar debug techniques for silicon, which is currently approached in something of an ad hoc manner.

“The problem is that when you have a new chip, and it doesn’t work when you’re in a board running software, it’s very, very difficult to figure out why,” said Scott Sandler, president and CEO of Novas Software, one of the founding companies.

“Not only is it a complex problem just to debug, but there is a whole chain that has to be unbroken in order to get data from the chip, to the board, to the pod, to the workstation and then analyse it to see what’s going on.”

“The problem is there are no standards along this chain,” said Sandler. “What do you standardise? We don’t even know yet – that’s what the consortium is all about.”

Other member companies include Corelis, Dafca and Intellitech. Xilinx has also expressed an interest in getting involved.

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