C-Level language translator tool ups gate design count

C-Level language translator tool ups gate design countRichard Ball  
C-Level Design has given its first European demonstrations of a compiler tool that translates C-code into a hardware description language.
The US firm, exhibiting for the first time at DATE, claims its tool will cut design times and enable hardware designers increase tenfold the number of gates they can design.
“Hardware and software development are both seeing problems,” explained David Park, v-p of marketing at C-Level.
More and more, designs need to be simulated at the system level, well before hardware has been defined. It is at the system level where trade-offs between the hardware and software are made.
“System designers are starting to use C, but there’s a gap in the design flow,” said Park. “There’s no direct route from C to HDL.”
Today, hardware designers using C are describing and simulating the logic in C. When they are satisfied, the hardware is re-written in the HDL. Verifying that the two descriptions are equivalent is difficult.
Therefore C-Level has developed its compiler/synthesis tool. It uses only ANSI C, which makes it easier for designers to use because no complex extra features have been added.

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