Cray continues memory feast with SRC 6

Cray continues memory feast with SRC 6
Richard Ball The legacy of supercomputer guru Seymour Cray lives on at SRC Computers, the Colorado company he founded in 1996. The company’s latest design, the SRC 6, is to be evaluated by the Oak Ridge National Laboratory (ORNL), a US Department of Energy (DoE) group. The DoE is looking for supercomputers to achieve 40Tops (trillions of operations per second) by the year 2003. A key feature of Cray’s designs has always been high performance memory subsystems, something SRC has continued with the SRC 6. Each processor has large amounts of memory. This, added to the fact that SRAM is used rather than DRAM, makes each node very fast. “By using large numbers of memory banks and a separate memory port for each processor, memory throughput and system performance are dramatically improved over bus-based systems,” said Ken Kliewer, director of the ORNL centre for computational sciences. To reduce cost and complexity, the DoE has a policy of using commodity products wherever possible. Thus the SRC 6 processors will be Intel Pentium II Xeon chips running at 400MHz and more. To speed up certain tasks, some of the processing will be handled by programmable logic, in this case blocks of FPGAs. These can be re-programmed in a few microseconds to perform a variety of tasks. The speed improvement over using a processor can be a factor of 10 or even 100. “The SRC design is truly innovative,” said Kliewer. “We expect the SRC 6 to out-perform other designs of comparable processor power and to be far easier to program.” ORNL’s evaluation of the SRC 6 machines will feed back into the design of SRC Computers’ next generation, the SRC 7. This will use Intel’s 64-bit Merced processors and aims to hit the 40Tops target.


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