Distribution world – At your design service

Distribution world – At your design serviceIn a US view of the global distribution business engineering design services has come out as the next frontier. Avnet is making the news as it pushes into this area and other firms are also taking the plunge. By Heidi Elliott
Avnet’s recent disclosure of its push into engineering design services may have grabbed the headlines, but that company is far from alone in its attention to this area. A number of distributors searching for the next big value-added service believe the answer might lie in design work.
Most major distributors now offer design services as part of their value-added offerings. Recently it has gained more attention, and momentum, as part of the outsourcing trend by OEMs. “It is the next big thing,” for distributors, said Robin Gray, executive v-p of theUSNational Electronic Distributors Association. “At the earliest stages, getting the design-win registration and getting the production unit sell, increasingly that’s where they see value added. They get credit for the designing in the component, they sell the component for manufacturing–that’s gravy.”
And though distribution design services have been around for a few years, it has taken time for them to staff up to the appropriate level of technical expertise, Gray said. “Finding FAEs (field applications engineers) is difficult and takes time,” he noted.
Nearly all the distribution leaders have invested in their technical services to push demand-creation.
Specialist distributor Wyle Electronics, now part of the global Veba Electronics Group, has been doing design work for more than a decade, noted Michael J. Rohleder, president. Design work now accounts for about 25 per cent of Wyle’s revenues, and will continue to grow as a proportionate part of the business. “It’s a critical part of our structure moving forward. It’s valuable to the customer relationship and to the supplier relationship as we focus on demand-creation,” Rohleder said.
Wyle opened its first USAsic design centre in 1984, but the company president said no one expected it to be a sizeable part of the business. “When we first began, I don’t think we considered, at that time, that we’d (someday) have six different design centres around the country. It’s an incredible investment in infrastructure and people.”
In the Veba group companies, which includes Memec, EBVElektronik, WBC in Europe, Rohleder estimated there are 600 engineers on staff. He expects design services to expand significantly in the short term. “We think it will grow substantially over the next five years,” he said. “And it’s an ongoing investment. It’s a non-trivial game we’re playing and we’re making significant investments.” For example, he points to Altera, which is producing 1,000-gate parts. “That’s a huge opportunity for design-wins.”
Analysts believe the design market has much potential. Dataquest estimates the worldwide intellectual property (IP) market will grow at a compound annual rate of 32 per cent. Dataquest calculates the market this year will reach $1bn, and will grow to nearly $1.5bn next year.
The design migration to distribution is part of the overall move to outsourcing-companies are deciding they can jettison their own design operations, and save money while focusing on their own core competencies. Target companies for distribution design services, said one analyst, are the ones that cannot afford tool seats of $150,000 available from the EDA companies, which focus mainly on the largest customers, leaving the medium and small sized customers to look elsewhere.
Other distributors see the similar opportunities. Globally, Arrow Electronics has five design centres within its semiconductor group.
Avnet has recently detailed the scope of its push into design and the company has set up a business unit dedicated to design. Avnet has broken its Design Services unit, which is headquartered in Arizona and has design centres in India and New Zealand, into three operational groups: demand-creation, design services and professional services (the creation and licensing of IP).
Heidi Elliott covers the distribution sector in USmagazine Electronic News DESIGN TIPS – Integrating ip cores into programmable logic design By Aris Sotiriou
Design reuse and integration of intellectual property (IP) cores is not a new idea. It is a design methodology which has been applied in Asic design for some time.
However, there is a different business model that applies when an IP methodology is used with programmable logic design. The cost of an IP core can be small when compared compared with the overall cost of a full custom Asic development.
The development cost for PLDs is generally lower than that for Asics. The development cost of a PLD design is essentially the device’s unit cost plus engineering time spend developing logic implementation.
As a result the IP core cost has to be scaled down to the level of PLD’s overall development cost in order to become part of the design flow.
Although possible to purchase the entire source code of a common IP core, the cost related with this approach can be restrictive, and can only be applied to very few PLD users. A more cost effective IP product is that of an encrypted net-list.
The IP provider should guarantee achievement of the functional and timing specifications. Along with the encrypted net-list, timing and logic constraints are necessary to be applied to the P&R tools, in order to be fully compliant with the core’s specification.
Typically, those constraints are supplied by the IP provider and are part of the optimisation work for a specific PLD vendor.
IP cores for PLDs are typically being developed by PLD manufacturers or by independent IP providers. Although PLD vendors will use IP cores and will promote them as shrink-wrap solutions, most of the independent IP developers will be happy to modify a standard IP core in order to suit any custom application.
From both sources of IP, a similar difficulty rises when the entire design does not meet the specifications. It is then necessary to be able to debug the interface between encrypted core and customer’s design.
A simple approach is to simulate a post layout net-list where hierarchical boundaries are preserved.
Going even further, the use of an embedded logic analyser implemented inside the target device, and capable of monitoring and displaying internal nodes (in particular those ones at the boundaries of the IP Core), will make IP integration and verification more effective.
Aris Sotiriou is an field applications engineer at Thame Components

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