Hardwired processor cores to give Altera on-chip boost

Hardwired processor cores to give Altera on-chip boost
Richard Wilson Altera is looking at the possibility of integrating hardwired microprocessor cores into its programmable logic devices. The firm, which is shipping what it claims is the industry’s first system on a programmable chip, the Apex 20K family, already offers software that emulates the processor function, known as soft cores, on its FPGAs. The company is coming to the view that it will need more on-chip processing performance than offered by soft cores if it is to offer systems-on-a-chip designs to compete with Asics in telecoms and video applications. “Right now there is a debate within the company about how and when we could include a hardwired processor core,” said Nigel Toon, Altera’s European managing director. Toon gave the example of the 32-bit MIPS R3000 microprocessor core. “On a 200,000 gate PLD this will use up 49 per cent of the available space, but on a million gate device this falls to just 11 per cent and on a two million gate device including the processor is no longer an issue,” said Toon. The Apex 20K already offers device densities of up to one million gates. Toon reckons that two million gate devices, that will make PLDs with hardwired processors on chip a reality should be achievable next year. He believes it is a major step for the firm, but one which will be needed to offer the level of processor performance required if programmable logic devices are to offer full system-on -a-chip capabilities. He accepts that the company is entering new territory. “Once we go down that road the company enters a completely different business model,” added Toon.


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