LSI details 0.18?m mixed-signal process

LSI details 0.18?m mixed-signal process
Richard Ball LSI Logic detailed the mixed-signal capabilities of its next generation 0.18?m manufacturing process at DATE. Since most of the chips developed at LSI Logic include analogue sections, mixed-signal development is critical to future products, said Iain Jackson, European marketing director. “We’ve been doing mixed-signal for several years, since 0.6?m,” said Jackson. Products include digital TV receivers and GSM chipsets. With the 0.18?m G12 process, mixed-signal was considered from the start. “We added features without affecting the performance of the digital,” Jackson said. Two analogue transistors are available, and like the digital side, one has a thicker gate oxide for higher voltage tolerance. “We also focused on the passive components,” he said. Three resistor types cover from milli-ohms per square to hundreds of ohms per square. LSI also built metal-to-metal capacitors using a thin dielectric between metal layer one and two. “It’s as good performance as double poly but without compromising the process,” Jackson said.


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