Mentor packs power in logic environment

Mentor packs power in logic environment
Richard Ball reports from the DATE 99 conference and exhibition held in Munich Mentor Graphics and its two subsidiaries, Model Technology and Exemplar Logic, have unveiled an integrated design environment for programmable logic designers. Called Packaged Power, the design flow combines synthesis from Exemplar, simulation from Model Tech and Mentor’s graphical entry tool. “The programmable logic market is growing very rapidly – even explosively,” said Martin Lampard, European MD for Model Tech and Exemplar. “In Europe, markets such as telecoms are pushing the envelope.” The use of hardware description languages (HDLs) and synthesis are gaining prominence as FPGAs become ever larger, said Lampard. “We see synthesis as a mandatory technology for FPGA design,” he said. Until now, having the right tools to manage the HDLs, simulate the design and synthesise it ready for fitting on the device has meant buying point tools from several suppliers. “But in the past, point tools have not worked well together,” said Mentor’s design flow expert, Brian Dalio. So Mentor designed a single flow, where all three tools work on the same data through a single user interface. The user gets a single CD and a single licence. The tools work with the common HDLs, VHDL and Verilog, and run on Unix and Windows NT. The tools are available in several versions depending on the complexity of the FPGA design. Prices start at $11,995.


Leave a Reply

Your email address will not be published. Required fields are marked *

*