National tweaks low noise data transmission with ‘Bus LVDS'

National tweaks low noise data transmission with ‘Bus LVDS’National Semiconductor has developed a 400Mbit/s multi-input, multi-output, hot-swap, serial databus from its LVDS point-to-point serial interconnection technology – and has chips to prove it. Steve Bush Low voltage differential signalling (LVDS) is a low noise method of transmitting data around within boxes and between adjacent cabinets. It is usually a point to point system, however National Semiconductor has tweaked its implementation to make it the physical layer of a full 400Mbit/s multi-input multi-output two wire serial bus. It is calling the new interface ‘Bus LVDS’. Bus LVDS revealed To minimise generated noise LVDS uses low voltage (approx 350mV) signals in differential pairs. The transmitter is a current source feeding the conductor pair through a bridge switch. These four switches connect one conductor to the current source and the other to ground. The receiver is a high impedance comparator with a resistor across its input terminals which completes the current loop. Current flows around the loop in one direction or the other, depending on the position of the switches to indicate a 1 or 0.
Changes to make LVDS into a multi-point bus include increasing the transmitter current source from 3.5mA in the point to point system to 10mA. Another seeks to even-up the apparent impedances of the driver outputs to the bus. In normal LVDS, one line is connected to a current source (infinite impedance) and the other is grounded (zero impedance). This causes non-symmetrical reflections from the outputs. National is not revealing how it has been done, but says it has take steps to make the outputs a similar impedance and reflections symmetrical. Several 100Mbit/s Bus LVDS channels can combine over low-cost SCSI-type interface cables to deliver 2.4Gbit/s throughput, claims National. The number of tranceivers that a bus can stand varies with length and required bandwidth. A 20 card half-metre long backplane can operate at 200Mbit/s. The company is aiming Bus LVDS at datacom applications including 10/100 and gigabit Ethernet switches, but claims LVDS’ low noise characteristics have sparked significant interest from telecoms companies, and industrial control makers want it for its robustness against EMI. Among other claims, National says that Bus LVDS is immune to data corruption caused by ‘hot swapping’ cards or powering-down connected tranceivers. In addition to a range of transmitters and receivers, National has produced a 8-bit parallel to serial converter chip and a corresponding serial to 8-bit parallel chip for its initial offering. Used in a pair, these can eat a 40Mhz 8-bit data bus and its clock, then reconstruct them up to several metres away without adding bit skew problems. Parameter Bus LVDS TTL/CMOS GTL/BTL PECL Output voltage swing ? 300mV 2.4-5.5V 1V ? 800mV Receiver threshold ? 100mV 1.2/1.5V ? 200mV ? 200mV Max speed (per channel) >400Mbit/s <50mbit>400Mbit/s Drive 10mA 75mA 40-80mA 40-60ma Noise low high medium medium Hot insertion yes no yes yes High Z on power down yes no yes yes Implementation simple simple complex complex


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