NEC samples 128Mbit DRAMs which meet Intel PC-100 spec

NEC samples 128Mbit DRAMs which meet Intel PC-100 spec
Richard Ball Memory manufacturer NEC is sampling 128Mbit synchronous DRAMs that conform to PC-100, Intel’s specification for the 100MHz system bus. “The main reason for having the 128Mbit chip is granularity size in memory modules,” said Mike Hopkins, senior product manager for memory at NEC. With a 16-bit version available, four devices are needed in a memory module, giving a minimum module size of 64Mbytes. This is becoming the standard size being delivered in PCs. “In terms of the PC-100 specification, I don’t think there’s any problem. Using low voltage TTL signalling we can go to 125MHz,” said Hopkins. Doubling memory size from 64 to 128Mbit, rather than making the conventional fourfold jump, allows NEC to use the same 0.22?m process. The next size, 256Mbit, will be a year behind, Hopkins said, because it requires 0.18?m technology. The intermediate size enables NEC to try out a new technique for forming the DRAM capacitors. Called hemispherical grain stacked capacitor, the technique will be used through to 1Gbit memories.


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