TI 32-bit DSP extends floating point to a billion

TI 32-bit DSP extends floating point to a billion32-bit C6701 core has the same internal structure as the 16-bit fixed point C6201; it differs in that six of the eight functional units have been redesigned to accommodate 32-bit floating point operations. Roy Rubenstein. Texas Instruments has detailed its first DSP capable of executing a billion floating point operations per second (1Gflop). The TMS320C6701 promises to do for floating point what the introduction of the C6201 has done for fixed point DSP: extend tenfold the raw DSP performance offered in a single device. First samples are expected in the third quarter of this year. The 32-bit C6701 core has the same internal structure as the 16-bit fixed point C6201: a very long instruction word (VLIW) architecture which exercises two data paths, each comprising four functional units. Where it differs is that six of the eight functional units have been redesigned to accommodate 32-bit floating point operations. The C6701 will be clocked at 167MHz, compared to the 200MHz C6201. This is due to the increased complexity of the two floating point multiply/ accumulate (MAC) units. The C6701’s 1Gflop/s performance is achieved when all six units operate in the one clock cycle. The 0.18?m DSPwill have a 4W power consumption. The floating point DSP will also be pin-for-pin compatible with the C6201. This brings two advantages: “Companies can get products to market three to six months earlier, by using the floating point device first and then moving the design to the cheaper fixed point device,” said Jean-Marc Darchy, TI’s European DSP marketing manager. It also means that engineers, whether tackling a design using fixed or floating point arithmetic, need learn only one tool set. Tool sweet… The result of Texas Instruments acquiring GO-DSP is being reflected in the introduction of visualisation tools and dependency graphs within the tool suite. Darchy expects the floating point IC to prove popular for applications such as voice mail servers, cellular basestations, pattern recognition systems and medical imaging. Rob Shaddock, technical director of DSP specialist Loughborough Sound Images, also highlights defence applications. “The defence world may be seen as boring but it is still where a lot of signal processing happens.” What excites Shaddock more is multi-channel speech recognition. “Floating point is not de rigueur for speech recognition but most of the more sophisticated algorithms are written in C on workstations,” said Shaddock. “With the C6701 and TI’s C compiler, you can now look at embedding quite complex speech recognition algorithms.” TI has been shipping the tools suite (rev 2.0) since March. It will also make the suite available for a one month free evaluation from June via its Web site. According to Darchy, new revisions will be released every six months. By the year 2000, TI expects to introduce two further device family members: a high performance 3Gflop/s device and a cheaper $50 part. The 167MHz C6701 costs $144 in 25,000 quantities.


Leave a Reply

Your email address will not be published. Required fields are marked *

*