UK project bumps up flip-chip yields

UK project bumps up flip-chip yields
Steve Bush Contract manufacturer Celestica is sponsoring Imperial College to improve the yield of flip-chips. “This method [we’ve developed] could raise the yield of bumped flip-chips,” said Dr Andrew Holmes, heading Imperial’s research team. “It also minimises wafer processing, making it more accessible to companies like Celestica who are not chip makers.” Flip-chips are packageless chips mounted directly onto circuit boards via solder bumps. Imperial’s proposal uses copper-only bumps, a further attraction to the likes of Celestica as European legislation may ban the use of lead in electronic assemblies by the year 2004. The initiative is up against stiff competition. “We are not the only ones working on such a process,” said Holmes. “There are several others including Fujitsu and IBM.” Conventional bumping involves adding solder or some other form of bump directly to bond pads on chips. In decal techniques, the bumps are formed on a separate carrier, where they can be quality-checked before being transferred to chips. Market pressures have ensured that the project is a short one, said Holmes. “It is only 18 months long and we are looking to demonstrate it next year.” The other project sponsors are excimer laser maker Exitech and the Engineering Physical Sciences Research Council.


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