US firm develops ARM competition

US firm develops ARM competition
Tom Foremski Silicon Valley-based Tensilica has developed a configurable Xtensa processor to compete directly with ARM’s processor cores. The Xtensa architecture is a synthesisable 32-bit processor core based on 70 instructions. It is aimed at low-power, high performance applications and will be clocked at 250MHz. “The advantage of Xtensa compared with architectures such as ARM and MIPS is that it is easy to configure it according to the customers’ needs because of its powerful software design tools,” said Bernie Rosenthal, v-p of marketing at Tensilica. “It is also easy to move the core to any foundry or manufacturing processes. We expect Xtensa to be implemented on 0.18?m CMOS very soon, sooner than our competitors.” Tensilica is aiming at a different customer base from ARM and MIPS. Instead of trying to find customers that produce general purpose Xtensa-based chips, Tensilica is targeting end customers, companies that are building products such as wireless communications devices or digital cameras and want to integrate quickly Xtensa with other functions. However, Tensilica faces stiff competition from the likes of ARC, Lexra and Triscend, which are all developing user-configurable cores. The Xtensa core uses 25k gates and Tensilica claims that with its software tools a new processor design can be completed from configuration to layout in one day. Xtensa has so far been licensed to Zilog. Tensilica is also working on porting onto its core real-time operating systems from Windriver Systems and other companies.


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