Xilinx PCI-bus core doubles data width and clock speed

Xilinx PCI-bus core doubles data width and clock speedRichard Ball  
 
Xilinx has announced a PCI-bus core for its programmable logic devices that it claims will run the full PCI specification of 66MHz at a data width of 64-bits.
This doubles both data width and clock speed compared with the previous core equating to a peak bandwidth of 528Mbyte/s.
“The 64-bit design is an extension of our 32-bit core which has been used in over 1,000 designs,” claimed Per Holmberg, product manager for cores at Xilinx.  
  Image at the core… Xilinx worked with 15 customers to test the PCI core in a variety of applications including imaging, Gigabit Ethernet, mass storage and ATM fibre channel interfaces. The picture shows an image processing card for medical equipment from Dome Imaging. The PCI interface, DMA controller, four dual port FIFOs and 200,000 gates of logic fit into a single V300 FPGA.  
 
“PCI is moving from just PCs to a lot of industrial applications. The market is moving up to 64-bit, 66MHz, driven by many networking standards such as Gigabit Ethernet,” Holmberg said.
There are three attributes that Xilinx has tried to meet with the new core: flexibility, compatibility and performance. These mean the core must work in standard FPGAs, be compliant with the PCI specification, and work at the full speed without any wait states.
However, in order to meet the first criterion, the company produced a faster speed grade of the Virtex family of FPGAs.
“Making a 66MHz system is not all that difficult, but a 66MHz PCI-core is much more difficult,” said Holmberg. “For a zero wait state core, you must meet the setup time of 3ns and a hold time of 0ns. The critical path is equivalent to more than 220MHz. Virtex is now fast enough to meet the spec.”
In order to achieve zero wait states, the critical section of the core has a predetermined layout. The smallest device that can hold the core and work at 66MHz is the XCV300, a device containing the equivalent of 300,000 gates.
“In the V300 the PCI-core occupies about 12 per cent of the resources,” Holmberg said.
Like other Xilinx cores, all the design files are delivered over the Web. The core costs $14,995.
Xilinx has worked with several design houses to provide a design service for the new core. Nallatech in Glasgow provides the service in the UK.


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