“With significant year-on-year sales growth in our key geographic markets of Europe and Asia, both in relation to our SoC design services and global IP licensing, this has been our best year ever,” says EnSilica CEO Ian Lankshear (pictured), “and we have equally ambitious plans for 2017/2018, both in terms of growing our existing markets and expanding into new ones.”
Crucial to EnSilica’s growth objectives is its need to attract a combination of experienced and fresh engineering talent to further extend its design capacity. To sustain its plans, EnSilica is seeking to recruit upwards of 10 additional, experienced chip architects, designers, layout and test engineers, particularly those with analog, mixed-signal and RF expertise to work primarily in the company’s specialist design centres in Bristol and Oxford.
Additionally, EnSilica is launching a training scheme for graduate and PhD electronics engineers, which will see trainees immersed in all aspects of the company’s design and engineering activities.
EnSilica offers SoC design and supply capabilities from system architecture to digital, analog and mixed-signal design, advanced verification using a range of methodologies including UVM and analog/mixed-signal modelling, physical implementation, prototype development and production chip supply services.
Additionally, EnSilica’s portfolio of eSi-IP comprises its eSi-RISC highly configurable and low power 16/32 bit embedded processors, eSi-Comms range of communications IP, eSi-ADAS automotive radar co-process IP, eSi-Connect range of processor peripherals and eSi-Crypto encryption IP.
“Our new training scheme will give graduate and PhD electronics engineers the opportunity to enter the workplace with a vibrant and growing company,” says Lankshear, “we believe this is not only in the long-term interests of the company, as it will ensure ready access to the analogue, mixed-signal and RF skills that we need, but also a responsibility to the industry in which we operate.”